Welcome![Sign In][Sign Up]
Location:
Search - verilog rs232

Search list

[VHDL-FPGA-Verilogfpga-nois

Description: 里面包含fpga的4个noic核 verilog(i2c,rs232,can,8051)。测试过不错-Which contains the four noic nuclear fpga verilog (i2c, rs232, can, 8051). Tested good
Platform: | Size: 9163776 | Author: feixue | Hits:

[Com PortverilogUART

Description: Uart串口程序,rs232,Verilog语言编写,-Uart serial program, rs232, Verilog language,
Platform: | Size: 2972672 | Author: 蒋思琪 | Hits:

[VHDL-FPGA-Verilogcetvrtak13

Description: 8通道示波器,采用DE2-115FPGA综合,带有RS232连接,VGA驱动,IR驱动。用verilog编写。-8-channel oscilloscope, using DE2-115FPGA integrated with RS232 connection, VGA driver, IR driver. Written in verilog.
Platform: | Size: 467968 | Author: 潘继汉 | Hits:

[VHDL-FPGA-Verilogserial_1

Description: RS232 protocol written in verilog There s four parts : top_level frequency receive data transmit data
Platform: | Size: 2048 | Author: Thomas | Hits:

[Com Portasync_receiver

Description: 用于RS232串口接收数据的verilog语言,时钟速率可改,可直接调用。- ON划词翻译ON实时翻译 Serial port for receiving data of the Verilog language, can be called directly.
Platform: | Size: 1024 | Author: yaobaixin | Hits:

[VHDL-FPGA-VerilogFPGA_51

Description: 51+FPGA架构的通讯口扩展,用verilog语言编写,扩展了I2C,SPI,RS232。-51+ FPGA architectures communication port expansion, with verilog language, extends the I2C, SPI, RS232.
Platform: | Size: 2926592 | Author: wcq | Hits:

[VHDL-FPGA-VerilogUART_FPGA_VerilogHDL

Description: FPGA RS232串口通信,Verilog HDL代码-FPGA RS232 serial communication, Verilog HDL code
Platform: | Size: 260096 | Author: 贺炜 | Hits:

[VHDL-FPGA-Verilog1---Serial-interface-(RS-232)

Description: Verilog HDL编写的RS232通信接口,包含RS232接口通信原理解析和编程实现文档-Verilog HDL prepared by the RS232 communication interface, including RS232 interface communication principles of parsing and programming documents
Platform: | Size: 24576 | Author: Tokeyman | Hits:

[VHDL-FPGA-VerilogUart

Description: FPGA verilog UART串口通信,可通过RS232串口与串口助手通信。-FPGA verilog UART communication, it could connect with UART assistor with RS232 port.
Platform: | Size: 8192 | Author: john | Hits:

[VHDL-FPGA-VerilogEx26_RS232

Description: 串口RS232实现,使用Verilog hd语言-rs232,verilog hdl
Platform: | Size: 123904 | Author: yinxiupu | Hits:

[VHDL-FPGA-Verilogbldc_motor_control_design_example

Description: 无刷直流电机 VHDL VERILOG 控制,速度环,RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA- actel VERILOG BLDC control of the use of actel FPGA
Platform: | Size: 741376 | Author: | Hits:

[VHDL-FPGA-Verilogsheji2

Description: 基于Verilog的数字温度计,用DS18B20采集温度,通过RS232接口与计算机实现串行通信-Verilog-based digital thermometer with DS18B20 collecting temperature, serial communication interface with the computer via RS232
Platform: | Size: 4896768 | Author: 方思 | Hits:

[Com PortIIC

Description: IIC读写发送到PC串口的verilog源程序-IIC send the data to rs232 by pc
Platform: | Size: 3841024 | Author: boren | Hits:

[VHDL-FPGA-VerilogFPGA_SDRAM

Description: UART作为RS232协议的控制接口得到了广泛的应用,将UART的功能集成在FPGA芯片中,可使整个系统更为灵活、紧凑,减小整个电路的体积,提高系统的可靠性和稳定性。提出了一种基于FPGA的UART的实现方法,具体描述了发送、接收等模块的设计,恰当使用了有限状态机,实现了FPGA片上UART的设计,给出了仿真结果。-fpga verilog uart sram
Platform: | Size: 20303872 | Author: jackwu | Hits:

[VHDL-FPGA-Verilogrs232_auto

Description: verilog实现通过RS232自发自收,波特率为115200,传输格式为1位起始位,8位数据位,1位停止位,无校验位-verilog through RS232 spontaneous self-closing, 115200 baud rate, transmission format is one start bit, 8 data bits, 1 stop bit, no parity bit。
Platform: | Size: 5898240 | Author: 陈勇 | Hits:

[VHDL-FPGA-VerilogPS2_RS232

Description: PS2 RS232源码,ISE建立工程可直接使用,已经通过测试-PS2 RS232 verilog code,can use directly
Platform: | Size: 14336 | Author: 飞草 | Hits:

[VHDL-FPGA-Verilogurat

Description: rs232的verilog的代码,code is based on verilog language, it is practical, we hope to help
Platform: | Size: 4096 | Author: 李丽 | Hits:

[VHDL-FPGA-Verilogserial

Description: FPGA实现232通讯,用verilog语言(RS232 communication design in FPGA with verilog)
Platform: | Size: 2048 | Author: gq_zhou | Hits:

[VHDL-FPGA-VerilogNo.201710061347=UART_Verilog

Description: 1.硬件平台: FPGA; 2.编程语言: Verilog; 3.串口通信RS232的Verilog实现版本;(1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;)
Platform: | Size: 56320 | Author: 记忆工人2017 | Hits:

[VHDL-FPGA-Veriloguart

Description: 此上传文件实现的功能就是FPGA里实现从PC接收数据,然后把接收到的数据发回去。 使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)
Platform: | Size: 1649664 | Author: 木子桶 | Hits:
« 1 2 3 4 5 6 7 8»

CodeBus www.codebus.net